Heretofore, sine waves have been generated with digital circuitry either by direct read-out of values stored in a memory unit or by a digital signal processor generating the sequential values of the sine wave using an interpolative process. Each successive value, sin (a+b), of the sine wave can be calculated from the previous value, sin a, using the well-known trigonometric formulae: EQU sin (a+b)=sin a cos b+cos a sin b (1) EQU cos (a+b)=cos a cos b-sin a sin b, (2)
b=2.pi.FT, T is the desired or tolerable granularity (period between successive intervals) and F is the frequency of the sine wave. The calculating procedure suffers from the accumulation of round-off errors leading eventually to the generation of an exponentially increasing or decreasing sine wave.
U.S. Pat. No. 4,285,044, L. Thomas et al., issued Aug. 18, 1981, proposed that round-off error accumulation could be moderated by the use of rather elaborate circuitry for calculating the quantity 1+[1-cos.sup.2 (a+b)-sin.sup.2 (a+b)]/2 and using the calculated quantity as an approximation for a root-mean-square normalization to insure that the value of the generated cos.sup.2 (a+b)+sin.sup.2 (a+b) signal would initially converge to 1 and subsequently remain at approximately 1. The Thomas patent normalizing factor circuitry prevents exponential build-up or exponential decay of the calculated values of the sine wave and the corresponding cosine function. A less complex arrangement for avoiding exponential build-up or decay problem in a digital sine wave generator would clearly be attractive. It would also be advantageous to permit a given digital signal processor system to generate more sine waves or generate more frequent samples of a sine wave and thereby achieve finer granularity in the output wave.